Pci bus commands -46, Table 6-18. pci bus commands – Motorola DSP56301 User Manual
Page 164
Host-Side Programming Model
6
-46
DSP56301 User’s Manual
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The HI32 does not reach deadlock due to illegal PCI events. Illegal PCI events bring
the HI32 master and target state machines to the idle state.
Table 6-18. PCI Bus Commands
HC3/HBE3-HC0/HBE0
Executed as Command Type
0000
ignored
1
0001
ignored
1
0010
ignored
1
0011
ignored
1
0100
ignored
1
0101
ignored
1
0110
Memory Read
0111
Memory Write
1000
ignored
1
1001
ignored
1
1010
Configuration Read
1011
Configuration Write
1100
Memory Read
1101
ignored
1
1110
Memory Read
1111
Memory Write
Note:
All internal address decoding is ignored and DEVSEL is not asserted.