Motorola DSP56301 User Manual
Page 185
Host-Side Programming Model
Host Interface (HI32)
6
-67
6.8.9
Class Code/Revision ID Configuration Register (CCCR/CRID)
r (
A PCI-standard 32-bit read-only register mapped into the PCI configuration space in PCI
mode or in mode 0 (DCTR[HM]
=
$1 or $0). CCCR/CRID is accessed when a configuration
read command is in progress and the PCI address is $08. The host can access CCCR/CRID
only when the HI32 is in PCI mode (DCTR[HM]
≠
$1). The contents of CCCR/CRID are
hardwired and are unaffected by any type of reset.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
SC7
SC6
SC5
SC4
SC3
SC2
SC1
SC0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PI7
PI6
PI5
PI4
PI3
PI2
PI1
PI0
RID7
RID6
RID5
RID4
RID3
RID2
RID1
RID0
Figure 6-18. Class Code/Revision ID Configuration Register CCCR/CRID)
Table 6-27. Class Code/Revision ID Configuration Register (CCCR/CRID) Bit Definitions
Register
Bit Number
Bit Name
Description
CCCR
31–24
BC[7 –0]
PCI Device Base Class
$04:(Multimedia device)
23–16
SC[7–0]
PCI Device Sub-Class
$80:(Other multimedia device)
15–8
P[17–10]
PCI Device Program Interface
$00:(Default program interface)
CRID
7–0
RID[7–0]
Revision ID
Specify the DSP-specific identifier (as an extension of Device ID).
A = $01
B = $02
C = $03
D = $04