FUJITSU F2MCTM-16LX - Manual (Page 93)

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CHAPTER 3 INTERRUPTS
■ I/O register address pointer (IOA)
This is a 16-bit register that indicates the low-order address (A15 to A0) of the buffer and I/O register used
for data transfer. The high-order address (A23 to A16) are all zeroes, and any I/O between addresses
000000
H
and 00FFFF
H
can be specified. Figure 3.7-4 is a diagram of the IOA configuration.
Figure 3.7-4 I/O Register Address Pointer Configuration
■ Buffer Address Pointer (BAP)
This 24-bit register holds the address used for the next EI
2
OS transfer. BAP exists for each EI
2
OS channel.
Therefore, each EI
2
OS channel can be used for transfer with anywhere in the 16M bytes space. If the BF bit
of ISCS is set to '0' (update enabled), only the low-order 16 bits of BAP changes and BAPH does not
change.
A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IOA
(Undefined
when reset)