FUJITSU F2MCTM-16LX User Manual
Page 264
248
CHAPTER 14 16-BIT RELOAD TIMER
Table 14.3-3 Timer Control Status Registers (Low) (TMCSR: L)
Bit Name
Function
bit6
OUTE:
TOT pin Output enable bit
This bit sets the function of the TOT pin of the 16-bit reload timer.
When set to 0: Functions as general-purpose I/O port
When set to 1: Functions as TOT pin of 16-bit reload timer
bit5
OUTL:
TOT Pin output level select
bit
This bit sets the output level of the output pin of the 16-bit reload timer.
When set to 0:
operation
When set to 1: Outputs Low-level rectangular wave during TMR count
operation
When set to 0:
started
When set to 1: Outputs High-level toggle wave when 16-bit reload timer
started
bit4
RELD:
Reload select bit
This bit sets the reload operation at underflow.
When set to 1: At underflow, reloads value set in TMRLR to TMR,
continuing count operation (reload mode)
When set to 0: At underflow, stops count operation (one-shot mode)
bit3
INTE:
Underflow interrupt enable
bit
This bit enables or disables an underflow interrupt.
When an underflow occurs (TMCSR:UF = 1) with an underflow interrupt
enabled (TMCSR:INTE = 1), an interrupt request is generated.
bit2
UF:
Underflow generating flag
bit
This bit indicates that the TMR underflows.
When set to 0: Clears this bit
When set to 1: No effect
Read by read modify write instructions: 1 is always read.
bit1
CNTE:
Timer operation enable bit
This bit enables or disables the operation of the 16-bit reload timer.
When set to 1: 16-bit reload timer enters start trigger wait state. When the
start trigger is inputted, the count operation of the TMR is
restarted.
When set to 0: Stops count operation
bit0
TRG:
Software trigger bit
This bit starts the 16-bit reload timer by software.
The software trigger function works only when the timer operation is
enabled (CNTE = 1).
When set to 0: Disabled. The state remains unchanged.
When set to 1: Reloads value set in 16-bit reload register (TMRLR) to
16-bit timer register (TMR), starting TMR count operation
Read: 0 is always read.