FUJITSU F2MCTM-16LX - Manual (Page 335)

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CHAPTER 17 DTP/EXTERNAL INTERRUPTS
17.3.1 DTP/External Interrupt Factor Register (EIRR1)
The DTP/external interrupt factor register holds DTP/external interrupt factors.
When a valid signal is inputted to the DTP/external interrupt pin, the corresponding
DTP/external interrupt request flag bit is set to "1".
The EIRR1 register is corresponding to INT8, INT9R, INT10, INT11, INT12R, INT13,
INT14R, and INT15R.
■ DTP/External Interrupt Factor Register (EIRR1)
Figure 17.3-2 DTP/External Interrupt Factor Register (EIRR1)
R/W
X
EIRR1 0000CB H XXXXXXXX B
12 13 11 10 9 8 14 15
R/W R/W R/W R/W R/W R/W R/W R/W bit15 to bit8
0
1
ER15 to ER8
ER15 ER14 ER13 ER12 ER11 ER10 ER9 ER8
DTP/external interrupt request flag bit
Read Write
No DTP/external interrupt input
DTP/external interrupt input
Clear of ER bit
No effect
Reset value
Address
: Read/Write
: Undefined