FUJITSU F2MCTM-16LX - Manual (Page 357)

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CHAPTER 18 8-/10-BIT A/D CONVERTER
18.2 Block Diagram of 8-/10-bit A/D Converter
The 8-/10-bit A/D converter consists of following blocks.
■ Block Diagram of 8-/10-bit A/D Converter
Figure 18.2-1 Block Diagram of 8-/10-bit A/D Converter
INTE INT PAUS STS1 STS0 STRT BUSY MD0 MD1
ANS2 ANS1 ANS0 ANE2 ANE1 ANS3 ANE3 ANE0
AVR
AVcc
AVss
AN0 to AN7
AN15 to AN8
ADTG
D9 D8 D5 D6 D4 D3 D2 D1 D0 D7
ST0 ST1 CT1 ST2 CT2 CT0
S10
2
8
2
3
3
: Undefined
Reserved : Always set to 0.
: Machine clock
Re-
served
Re-
served
A/D setting
register
(ADSR0/
ADSR1)
Decoder
A/D data
register
(ADCR0/
ADCR1)
D/A converter Internal data bus
Control circuit
Comparator
Sample &
hold circuit
Analog
channel
selector
Pin
Starting
selector
Software
starting
Interrupt request output
A/D control
status
register
(ADCS0/
ADCS1)
Re-
served