FUJITSU F2MCTM-16LX - Manual (Page 532)

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CHAPTER 22 ADDRESS MATCH DETECTION FUNCTION
22.4 Explanation of Operation of Address Match Detection
Function
If the addresses of the instructions executed in the program match those set in the
detection address setting registers (PADR0 to PADR5), the address match detection
function will replace the first instruction code executed by the CPU with the INT9
instruction (01
H
) to branch to the interrupt processing program.
■ Operation of Address Match Detection Function
Figure 22.4-1 shows the operation of the address match detection function when the detect addresses are set
and an address match is detected.
Figure 22.4-1 Operation of Address Match Detection Function
■ Setting Detect Address
1) Disable the detection address setting register 0 (PADR0) where the detect address is set for address
match detection (PACSR0: AD0E=0).
2) Set the detect address in the detection address setting register 0 (PADR0). Set "FF
H
" at the higher bits,
"00
H
" at the middle bits, and "1F
H
" at the lower bits of the detection address setting register 0
(PADR0).
3) Enable the detect address setting register 0 (PADR0) where the detect address is set for address match
detection (PACSR0: AD0E=1).
■ Program Execution
1) If the address of the instruction to be executed in the program matches the set detect address, the first
instruction code at the matched address is replaced by the INT9 instruction code ("01
H
").
2) INT9 instruction is executed. INT9 interrupt is generated and then interrupt processing program is
executed.
FF001C :
FF001F :
FF0022 : A8 00 00
4A 00 00
4A 80 08 MOVW
MOVW
MOVW RW0,#0000
A,#0000
A,#0880
Address Mnemonic Instruction code
Program execution
The instruction address to be
executed by program matches
detect address setting register 0
Replaced by INT9 instruction (01
H
)