FUJITSU F2MCTM-16LX - Manual (Page 148)

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CHAPTER 7 RESETS
7.6 Status of Pins in a Reset
This section describes the status of pins when a reset occurs.
■ Status of Pins during a Reset
The status of pins during a reset depends on the settings of mode pins (MD2 to MD0).
About status of each pins during reset, please see "8.7 Status of Pins in Standby Mode and during Hold and
Reset".
●
When internal vector mode has been set: (MD2 to MD0 = "011
B
")
All I/O pins (resource pins) are high impedance, and mode data is read from the internal ROM.
■ Status of Pins after Mode Data is Read
The status of pins after mode data has been read depends on the mode data (M1 and M0).
●
When single-chip mode has been selected (M1, and M0 = "00
B
")
All I/O pins (resource pins) are high impedance, and mode data is read from the internal ROM.
Note:
For those pins that change to high impedance when a reset cause is generated, confirm that devices
connected to the pins do not malfunction.