FUJITSU F2MCTM-16LX - Manual (Page 493)

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21.4.21 Acceptance Mask Select Register (AMSR)
This register selects masks (acceptance mask) for comparison between the received
message ID’s and the message buffer ID.
■ Register Configuration
Figure 21.4-21 Configuration of the Acceptance Mask Select Register (AMSR)
Address bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 AMSR1(Byte0)
CAN1: 007D10 H AMS3.1 AMS3.0 AMS2.1 AMS2.0 AMS1.1 AMS1.0 AMS0.1 AMS0.0 Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
Address bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 AMSR1(Byte1)
CAN1: 007D11 H AMS7.1 AMS7.0 AMS6.1 AMS6.0 AMS5.1 AMS5.0 AMS4.1 AMS4.0 Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
Address bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 AMSR1(Byte2)
CAN1: 007D12 H AMS11.1 AMS11.0 AMS10.1 AMS10.0 AMS9.1 AMS9.0 AMS8.1 AMS8.0 Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
Address bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 AMSR1(Byte3)
CAN1: 007D13 H AMS15.1 AMS15.0 AMS14.1 AMS14.0 AMS13.1 AMS13.0 AMS12.1 AMS12.0 Reset value
XXXXXXXX
B
R/W R/W R/W R/W R/W R/W R/W R/W
R/W : Read/Write
X : Undefined