FUJITSU F2MCTM-16LX - Manual (Page 678)

662
INDEX
List of Registers and Reset Values of ROM Mirroring
Function Select Module ....................... 527
ROM Mirroring Function Select Register
ROM Mirroring Function Select Register (ROMM)
.......................................................... 528
ROMM
ROM Mirroring Function Select Register (ROMM)
.......................................................... 528
ROM Security Function
Overview of ROM Security Function ................. 566
RP
Register Bank Pointer (RP) ................................. 43
RST
RST and RY/BY Timing ................................... 641
RY
RST and RY/BY Timing ................................... 641
RY/BY Timing during Writing/erasing ............... 641
S
Sample Program
Sample Program for Low Voltage/CPU Operating
Detection Reset Circuit ........................ 380
Sampling Time
Setting of Sampling Time (ST2 to ST0 bits) ........ 354
SCR
Serial Control Register (SCR) ............................ 393
Sector Configuration
Sector Configuration of the 512K-bit Flash Memory
.......................................................... 531
Sector Erase Command
Chip Erase/sector Erase Command Sequence ...... 639
Sector Protect
Enable Sector Protect/verify Sector Protect ......... 642
Temporary Sector Protect Cancellation ............... 643
Serial Clock
Oscillating Clock Frequency and Serial Clock
Input Frequency .................................. 556
Serial Control Register
Serial Control Register (SCR) ............................ 393
Serial Programming Connection
Basic Configuration of Serial Programming
Connection with MB90F362/T(S),
MB90F367/T(S)
.................................. 554
Example of Serial Programming Connection
(Power Supplied From Programmer) ..... 559
Example of Serial Programming Connection
(User Power Supply Used) ................... 557
Serial Status Register
Serial Status Register (SSR) .............................. 397
Setting
Setting for 16-bit PPG Output Operation Mode
.......................................................... 304
Signal Mode
Signal Mode .................................................... 421
Single Clock
Sub-clock Mode with External Single Clock Product
......................................................... 116
Single-chip Mode
Status of I/O Pins (Single-chip Mode) ................ 156
Single-shot Conversion Mode
Operation of Single-shot Conversion Mode ........ 361
Setting of Single-shot Conversion Mode ............ 360
Single-shot Conversion Mode
(ADCS:MD1,MD0= "00
B
" or "01
B
" )
......................................................... 359
Sleep Mode
Return from Sleep Mode ................................... 146
Switching to Sleep Mode .................................. 145
SMR
LIN-UART Serial Mode Register (SMR) ........... 395
Software Interrupt
Software Interrupt Operation ............................... 72
Software Interrupts ....................................... 57, 72
Structure of Software Interrupts ........................... 72
Special Registers
Special Registers ................................................ 37
SSP
User Stack Pointer (USP) and System Stack Pointer
(SSP) ................................................... 41
SSR
Serial Status Register (SSR) .............................. 397
ST
Setting of Sampling Time (ST2 to ST0 bits) ....... 354
Standby Mode
Cancellation of Standby Mode by Interrupt ........ 157
Notes on Accessing the Low-Power Consumption
Mode Control Register (LPMCR) to
Enter the Standby Mode ...................... 158
Note on Canceling Standby Mode ..................... 157
Notes on the Transition to Standby Mode ........... 157
Operation Status during Standby Mode .............. 143
Standby Mode ................................................. 135
Transition to Standby Mode .............................. 157
Status Bit
Correspondence between Node Status Bit and Node
Status ................................................. 456
Status Change
Status Change Diagram .................................... 155
Stop Mode
Stop Mode ............................................... 116, 152
Storing Patch Program
Operation of Address Match Detection Function at
Storing Patch Program in E
2
PROM
......................................................... 520
Structure
Structure ........................................................... 75