FUJITSU F2MCTM-16LX - Manual (Page 103)

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CHAPTER 4 DELAYED INTERRUPT GENERATION MODULE
4.3.1 Delayed interrupt request generate/cancel register
(DIRR)
The delayed interrupt request generate/cancel register (DIRR) generates or cancels a
delayed interrupt request.
■ Delayed Interrupt Request Generate/cancel Register (DIRR)
Figure 4.3-2 Delayed Interrupt Request Generate/cancel Register (DIRR)
Address 15 14 13 12 11 10 9 8 Reset value
00009F
H
R0 XXXXXXX0
B
− − − − − − − R/W
−
: Undefined
R/W : Read/Write R/W
: Reset value
bit8
R0 Delayed interrupt request generate bit
0 Release of delay interrupt request
1 Generation of delay interrupt request
Table 4.3-1 Functions of Delayed Interrupt Request Generate/Cancel Register (DIRR)
Bit name Function
bit8 R0:
Delayed interrupt
request generate bit This bit generates or cancels a delayed interrupt request.
When set to "0": Cancels delayed interrupt request
When set to "1": Generates delayed interrupt request
bit9
to
bit15 Undefined bits Read: The value is undefined.
Write: No effect