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FUJITSU F2MCTM-16LX User Manual

Page 352

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CHAPTER 17 DTP/EXTERNAL INTERRUPTS

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Processing by user

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RETI ;Return from interrupt processing

CODE ENDS

;---------Vector setting------------------------------------------

VECT CSEG ABS=0FFH

ORG 00FF94H ;Set vector to interrupt number

#26(1A

H

)

DSL WARI

ORG 00FFDCH ;Reset vector set

DSL START

DB 00H ;Set to single-chip mode

VECT ENDS

END START

Program Example of DTP Function

Processing specification

Channel 0 of the EI

2

OS is started by detecting the High level of the signal input to the INT8 pin.

RAM data is outputted to port 5 by performing DTP processing (EI

2

OS).

Coding example

ICR07 EQU 0000B7H ;DTP/external interrupt control

register

DDR6 EQU 000016H ;Port 6 direction register

DDR5 EQU 000015H ;Port 5 direction register

ENIR1 EQU 0000CAH ;DTP/external interrupt enable

register 1

EIRR1 EQU 0000CBH ;DTP/external interrupt factor

register 1

ELVR1L EQU 0000CCH ;Detection level setting register 1:"L"

ELVR1H EQU 0000CDH ;Detection level setting register 1:"H"

ADER5 EQU 00000BH ;Port5 analog input enable register

ADER6 EQU 00000CH ;Port6 analog input enable register

ER1 EQU EIRR:0 ;INT8 interrupt request flag bit

EN1 EQU ENIR:0 ;INT8 interrupt request enable bit

;

BAPL EQU 000100H ;Buffer address pointer lower

BAPM EQU 000101H ;Buffer address pointer middle

BAPH EQU 000102H ;Buffer address pointer higher

ISCS EQU 000103H ;EI

2

OS status register

IOAL EQU 000104H ;I/O address register lower

IOAH EQU 000105H ;I/O address register higher

DCTL EQU 000106H ;Data counter lower

DCTH EQU 000107H ;Data counter higher