FUJITSU F2MCTM-16LX - Manual (Page 379)

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CHAPTER 18 8-/10-BIT A/D CONVERTER
■ Operation of Continuous Conversion Mode
• When the start trigger is inputted, A/D conversion starts from the channel set by the A/D conversion
start channel select bits (ANS3 to ANS0) and is performed continuously up to the channel set by the A/
D conversion end channel select bits (ANE3 to ANE0).
• When A/D conversion for the channel set by the A/D conversion end channel select bits (ANE3 to
ANE0) is terminated, it is continued after returning to the channel set by the A/D conversion start
channel select bits (ANS3 to ANS0).
• To terminate A/D conversion forcibly, write 0 to the A/D conversion-on flag bit in the A/D control
status register (ADCS:BUSY).
• This mode cannot be restarted during A/D conversion.
[When start and end channels are the same]
If the start and end channels have the same channel number (ADCS:ANS3 to ANS0 = ADCS:ANE3 to
ANE0), A/D conversion for one channel set as the start channel (= end channel) is repeated.
[Conversion order in continuous conversion mode]
Table 18.5-2 gives an example of the conversion order in the continuous conversion mode.
Table 18.5-2 Conversion Order in Continuous Conversion Mode
Start Channel End Channel Conversion Order
AN0 pin
(ADCS: ANS="0000
B
")
AN3 pin
(ADCS: ANE="0011
B
")
AN0
→ AN1 → AN2 → AN3 → AN0 →
repeat
AN3 pin
(ADCS: ANS="0011
B
")
AN3 pin
(ADCS: ANE="0011
B
")
AN3
→ AN3 → repeat