FUJITSU F2MCTM-16LX - Manual (Page 49)

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CHAPTER 2 CPU
2.4 Linear Addressing
There are 2 types of linear addressing:
• 24-bit operand specification: Directly specifies a 24-bit address using operands.
• 32-bit register indirect specification: Indirectly specifies the 24 low-order bits of a 32-
bit general-purpose register value as the address.
■ 24-bit Operand Specification
Figure 2.4-1 shows an example of 24-bit operand specification. Figure 2.4-2 shows an example of 32-bit
register indirect specification.
Figure 2.4-1 Example of Linear Method (24-bit operand specification)
Figure 2.4-2 Example of Linear Method (32-bit register indirect specification)
17
12
452D
3456
17452D H
123456
H
JMPP 123456H
JMPP 123456H
Old program counter
+ Program bank
+ Program bank
New program counter
Next instruction
XXXX
RL1
3A
Old AL
New AL
MOV A, @RL1+7
240906F9
090700 H
003A
7
(The high-order 8 bits are ignored.)