FUJITSU F2MCTM-16LX - Manual (Page 610)

594
APPENDIX
■ Calculating the execution cycle count
Table B.5-1 lists execution cycle counts and Table B.5-2 and Table B.5-3 summarize correction value data.
Table B.5-1 Execution Cycle Counts in Each Addressing Mode
Code Operand
(a)
*
Register access count in each
addressing mode
Execution cycle count in each
addressing mode
00
|
07
Ri
Rwi
RLi
See the instruction list. See the instruction list.
08
|
0B
@RWj 2 1
0C
|
0F
@RWj+ 4 2
10
|
17
@RWi+disp8 2 1
18
|
1B
@RWi+disp16 2 1
1C
1D
1E
1F
@RW0+RW7
@RW1+RW7
@PC+disp16
addr16 4
4
2
1 2
2
0
0
*: (a) is used for (cycle count) and B (correction value) in "B.8 F
2
MC-16LX Instruction List".