FUJITSU F2MCTM-16LX - Manual (Page 69)

53
CHAPTER 2 CPU
Example:
If "DIV A,R0" is executed with DTB = "053
H
" and RP = "03
H
", the address of R0 is "0180
H
" + RP
("03
H
")
× "10
H
" + "08
H
" (R0 corresponding address) = "0001B8
H
". Since the data bank register (DTB)
is specified by "DIV A,R0" as the bank register, the remainder is stored in address "05301B8
H
", which
was obtained by adding the bank address "053
H
".
Note:
For information about the bank register and Ri and RWi registers, see "2.7 Registers".
■ Use of the "DIV A, Ri" and "DIVW A, RWi" Instructions without Precautions
To enable users to develop programs without having to take precautions for using the "DIV A,Ri" and
"DIVW A,RWi" instructions, special compilers and assemblers are available. The special compiler does not
generate the instructions in Table 2.11-1 . The special assemblers have a function that replaces the
instructions in Table 2.11-1 with equivalent instruction strings. For the MB90360 series, use the following
types of compilers and assemblers:
●
Compiler
• cc907 V02L06 or later version, or fcc907s V30L02 or later version
●
Assembler
• asm907a V03L04 or later version, or fasm907s V30L04 (Rev. 300004) or later version