FUJITSU F2MCTM-16LX - Manual (Page 291)

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CHAPTER 15 WATCH TIMER
15.4 Watch Timer Interrupt
When the interval time is reached with the watch timer interrupt enabled, the overflow
flag bit is set to "1" and an interrupt request is generated.
■ Watch Timer Interrupt
Table 15.4-1 shows the interrupt control bits and interrupt factors of the watch timer.
• When the value set by the interval time select bits (WTC2 to WTC0) in the watch timer control register
(WTC) is reached, the overflow flag bit in the WTC register is set to "1" (WTC:WTOF = 1).
• When the overflow flag bit is set (WTC:WTOF = 1) with the watch timer interrupt enabled
(WTC:WTIE = 1), an interrupt request is generated.
• At interrupt processing, set the WTOF bit to 0 and cancel the interrupt request.
■ Watch Timer Interrupt and EI
2
OS Transfer Function
• The watch timer does not correspond to the EI
2
OS function.
• For details of the interrupt number, interrupt control register, and interrupt vector address, see
"CHAPTER 3 INTERRUPTS".
Table 15.4-1 Interrupt Control Bits of Watch Timer
Watch Timer
Interrupt factor Interval time of watch timer counter
Interrupt request flag bit WTC: WTOF(overflow flag bit)
Interrupt factor enable bit WTC: WTIE