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FUJITSU F2MCTM-16LX User Manual

Page 375

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CHAPTER 18 8-/10-BIT A/D CONVERTER

18.5

Explanation of Operation of 8-/10-bit A/D Converter

The 8-/10-bit A/D converter has the following A/D conversion modes. Set each mode
according to the setting of the A/D conversion mode select bits in the A/D control status
register (ADCS:MD1, MD0).
• Single-shot conversion mode (restartable/not-restartable during A/D conversion)
• Continuous conversion mode (not-restartable during A/D conversion)
• Pause--conversion mode (not-restartable during A/D conversion)

Single-shot Conversion Mode (ADCS: MD1, MD0="00

B

" or "01

B

")

When the start trigger is inputted, the analog inputs from the start channel (ADCS:ANS3 to ANS0) to

the end channel (ADCS:ANE3 to ANE0) are A/D-converted continuously.

The A/D conversion stops at the termination of the A/D conversion for the end channel.

To terminate A/D conversion forcibly, write 0 to the A/D conversion-on flag bit in the A/D control

status register (ADCS:BUSY).

When the A/D conversion mode select bits (MD1, MD0) are set to "00

B

", this mode can be restarted

during A/D conversion. If the bits are set to "01

B

", this mode cannot be restarted during A/D

conversion.

Continuous Conversion Mode (ADCS: MD1, MD0="10

B

")

When the start trigger is inputted, the analog inputs from the start channel (ADCS:ANS3 to ANS0) to

the end channel (ADCS:ANE3 to ANE0) are A/D-converted continuously.

When A/D conversion for the end channel is terminated, it is continued after returning to the analog

input for the start channel.

To terminate A/D conversion forcibly, write 0 to the A/D conversion-on flag bit in the A/D control

status register (ADCS:BUSY).

This mode cannot be restarted during A/D conversion.

Pause-conversion Mode (ADCS: MD1, MD0="11

B

")

When the start trigger is inputted, A/D conversion starts for the start channel (ADCS:ANS3 to ANS0).

The A/D conversion pauses at the termination of A/D conversion for one channel. When the start trigger

is inputted while A/D conversion pauses, A/D conversion is performed for the next channel.

The A/D conversion pauses at termination of A/D conversion for the end channel. When the start trigger

is inputted while A/D conversion pauses, A/D conversion is continued after returning to the analog input

for the start channel.

To terminate A/D conversion forcibly, write 0 to the A/D conversion-on flag bit in the A/D control

status register (ADCS:BUSY).

This mode cannot be restarted during A/D conversion.