Delta DVP-ES2 - Manual (Page 187)

3 . I n s t r u c t i o n S e t
3 - 7 1
API Mnemonic Operands Function
17 D XCH P Exchange
Controllers
ES2/EX2 SS2
SA2
SE
SX2
Bit Devices Word devices Program Steps Type
OP X Y M S K H KnX KnY KnM KnS T C D E F
D
1
* * * * * * * *
D
2
* * * * * * * *
XCH, XCHP: 5 steps
DXCH, DXCHP: 9 steps
PULSE 16-bit 32-bit
ES2/EX2 SS2
SA2
SE
SX2 ES2/EX2 SS2
SA2
SE
SX2 ES2/EX2 SS2
SA2
SE
SX2
Operands:
D
1
: Device to be exchanged 1 D
2
: Device to be exchanged 2
Explanations:
1. The contents in the devices designated by D
1
and D
2
will exchange
2. It is better to apply a pulse execution for this instruction (XCHP).
3. If operand D1 and D2 use index register F, only 16-bit instruction is available.
Program example:
When X0=OFF
→ON, the contents of D20 and D40 exchange with each other.
X0
D40 XCHP D20
Before
execution
After
execution
120
120 40
40 D20
D40
D20
D40
Points to note:
1. As a 16-bit instruction, when the devices designated by D
1
and D
2
are the same and M1303
= ON, the upper and lower 8 bits of the designated devices exchange with each other.
2. As a 32-bit instruction, when the devices designated by D
1
and D
2
are the same and M1303
= ON, the upper and lower 16 bits in the designated device exchange with each other.
3. When X0 = ON and M1303 = ON, 16-bit contents in D100 and those in D101 will exchange
with each other.
X0
M1303
9
20
20
9
D100L
D100H
8
40
40
8
D101L
D101H
D100L
D100H
D101L
D101H
DXCHP D100 D100
Before
execution
After
execution