Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 82)

Functional Description
ARTM-831X Installation and Use (6806800M76E) 82
4.3.4 FRU Data
The E1/T1 mezzanine expansion unit provides a 512-byte FRU ROM. It contains the FRU data of
the unit, consisting of a serial number of the board and some additional information used for
H/W inventory management. The EEPROM has an I2C interface and is connected to the private
I2C interface of IPMC building block.
4.4 DS3/OC3 Mezzanine Expansion Unit
The ARTM-831X_DS3/OC3 mezzanine expansion PCA unit adds a total capacity of 520/688
multiplexed E1/T1 base rate TDM interfaces to the ARTM-831X assembly. These compose of
two Temux336 plus two octal E1/T1 Framer devices. It includes the TSI unit, clock
synchronization features and status & alarm signal collection and propagation.
4.4.1 TSI FPGA
Following key features are provided by the TSI FPGA device on the DS3/OC3 mezzanine
expansion unit.
 64k TDM channels interchange management
Provides GR8 message handling for T1 lines and T1 links transferred over SONET/DS3
 Pass on synchronous system clocks to the particular TEMUX framer devices
 TSIP2SerDes conversion for front board communication
 PCIe x1 host interface & bridge to local bus
 2x HMVIP interfaces to E1/T1 Framers
 2x SBI336 interfaces to SONET/SDH Framers
Pre-selects reference clock for SONET/DS3 framer 0/1 and E1/T1 framer 0/1
 SONET/SDH Overhead and Alarm ports
 Update/failback SPI configuration Flash in working/golden mode
4.4.1.1 SPI Interface
The TSI- FPGA on the DS3/OC3 mezzanine expansion unit has three SPI interfaces in total that
are configured as point-to-point connection each: