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13 force crc error register, Table 8-37, Force crc error register – Artesyn ARTM-831X Installation and Use (June 2014) User Manual

Page 138: Base artm fpga

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Base ARTM FPGA

ARTM-831X Installation and Use (6806800M76E)

138

8.3.1.13 Force CRC Error Register

4

Drive Signal N54640_INT_

1

MMC: r
RTM: r/w

5

Drive Signal N54640_SPD0

0

MMC: r
RTM: r/w

6

Drive Signal N54640_SUPER_I

0

MMC: r
RTM: r/w

7

Drive Signal N54640_WIRESPD

0

MMC: r
RTM: r/w

Table 8-36 GE Control Register (continued)

Address: 0x0C

Bit Description

Default

Access

Table 8-37 Force CRC Error Register

Address: 0xD

Bit Description

Default

Access

7:0

Force CRC Error.
0x3C: Force configuration CRC Error. CONF_CRC_ERR will be
driven high.
All other values: The Force CRC Error is disabled. Only real CRC
errors will drive CONF_CRC_ERR high.

0

RTM r/w