Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 132)

Base ARTM FPGA
ARTM-831X Installation and Use (6806800M76E) 132
8.3.1.3 ARTM Base FPGA Code Sub-Version
7 Enable SFP I2C clock stretching.
0: I2C Clock stretching is disabled. Driving SCL of the selected
SFP interface is ignored.
1: I2C Clock stretching is enabled. The I2C Slave always stretches
to the SCL low phase at least to 5μs. Note: The I2C Master must
release MMC I2C clock SCL within 5μs. 0 MMC: r/w
Table 8-26 SFP I2C select Register (continued)
Address: 0x1
Bit Description Default Access
Table 8-27 ARTM Base FPGA Code Sub-Version
Address: 0x2
Bit Description Default Access
6:0 FPGA Code Sub-Version. Incremented together with Main-version
when the ARTM IP Code has changed.
Note: Which Sub-Version is read depends on bit 7 of
Table "Test
Register" on page 139
1 r
7 Reserved 0 r