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8 10 ge control register, Table 8-32, 10 ge control register – Artesyn ARTM-831X Installation and Use (June 2014) User Manual

Page 135: Base artm fpga

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Base ARTM FPGA

ARTM-831X Installation and Use (6806800M76E)

135

8.3.1.8

10 GE Control Register

7

Reserved

0

r

8

Level of Signal SFP_PLUS_TXFAULT

Ext.

RTM: r
MMC: r

9

Level of Signal SFP_PLUS_MOD_ABS

Ext.

RTM: r
MMC: r

10

Level of Signal N8707_PCDRLK

Ext.

RTM: r
MMC: r

11

Level of Signal N8707_PLOSB_

Ext.

RTM: r
MMC: r

15:12

Reserved

0

r

Table 8-31 10 GE Status Register (continued)

Address: 0x6 - 0x7

Bit Description

Default

Access

Table 8-32 10 GE Control Register

Address: 0x8

Bit Description

Default

Access

0

Drive Signal N8707_TXONOFF

1

RTM: r/w
MMC: r/w

1

Drive Signal SFP_PLUS_TXDIS

0

RTM: r/w
MMC: r/w

7:2

Reserved

0

r