Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 192)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 192
9.5.2 RTM FPGA Memories and Registers Detailed
Keys:
Access types:
R = Read
W = Write
RW = Write and Read back exactly what was written last time
RorW = Write one value, eg. transmit data or read other value, eg. receive data
0x18000
...
0x1FFFF XRT86Chip1 XRT86 framer 1 Registers (access redirected to 8bit local bus)
Refer to Xrt86 handbook [11]
0x20000
...
0x27FFF XRT86Chip2 XRT86 framer 2 Registers (access redirected to 8bit local bus)
Refer to Xrt86 handbook [11]
0x28000
...
0x2FFFF XRT86Chip3 XRT86 framer 3 Registers (access redirected to 8bit local bus)
Refer to Xrt86 handbook [11]
0x30000
...
0x37FFF XRT86Chip4 XRT86 framer 4 Registers (access redirected to 8bit local bus)
Refer to Xrt86 handbook [11]
0x38000
...
0x3FFFF XRT86Chip5 XRT86 framer 5 Registers (access redirected to 8bit local bus)
Refer to Xrt86 handbook [11]
0x40000
...
0x5FFFF PMC8310Chip0 PMC8310 framer 0 Registers (access redirected to 16bit local
bus)
Refer to PMC8310 handbook [14]
0x60000
...
0x7FFFF PMC8310Chip1 PMC8310 framer 1 Registers (access redirected to 16bit local
bus)
Refer to PMC8310 handbook [14]
Table 9-5 RTM FPGA Address map Overview (continued)