Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 268)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 268
9.5.2.13.2 Pmc83 and Xrt86 Framer Line Event Status Register
Address:
0x1610, Pmc83Xrt86LineEvtReg
Width: 32 bit
7 - - reserved undef - -
6...4 Xrt86OutChipSel RW 0b000: Xrt86OutChip0Sel,
Select framer chip 0
0b001: Xrt86OutChip1Sel,
Select framer chip 1
0brrr: reserved 0x0 X X
3 - - reserved undef - -
2...0 Xrt86OutPinSel RW 0b000: Xrt86OutPin0Sel,
Select output 0 of framer chip
chosen by SelXrt86Chip
0b001: Xrt86OutPin1Sel,
Select output 1 of framer chip
chosen by SelXrt86Chip
0b010: Xrt86OutPin2Sel,
Select output 2 of framer chip
chosen by SelXrt86Chip
0b011: Xrt86OutPin3Sel,
Select output 3 of framer chip
chosen by SelXrt86Chip
0b100: Xrt86OutPin4Sel,
Select output 4 of framer chip
chosen by SelXrt86Chip
0b101: Xrt86OutPin5Sel,
Select output 5 of framer chip
chosen by SelXrt86Chip
0b110: Xrt86OutPin6Sel,
Select output 6 of framer chip
chosen by SelXrt86Chip
0b111: Xrt86OutPin7Sel,
Select output 7 of framer chip
chosen by SelXrt86Chip 0b000 X X
Bit Acronym Type Description Default Pwr Soft