Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 195)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 195
It can be used by SW to store other channel associated information.
9.5.2.2 GR8 Memory (Gr8Mem)
Resets:
Pwr = Power on reset
Soft = Soft reset
The connection memory of the TSI is accessible to switch connections.
9.5.2.2.1 Gr8 Transmit Data Memory
Addresses
0x40000 ... 0x40FFF: Gr8TrmDatMem0 ... Gr8TrmDatMem1023
Bit Acronym Type
Description
Default
Pwr Soft
31...18 - - reserved undef - -
17 ChnCnctSpplmnt RW Channel Connection Supplementary bit without
impact on HW, can be used by SW
0b1: ChnCnctSpplmntSet, Channel Connection
Supplementary bit
0b0: ChnCnctSpplmntReset, Channel Connection
Supplementary bit
0x0 X X
16 ChnCnctIdle RW determines if idle pattern or switched data from an
TSI input is sent
0b1: ChnCnctIdleSet, send Idle
0b0: ChnCnctSppIdleReset, send switched data
0x0 X X
15...0 ChnCnctn RW If ChnIdle is not set: Channel Connection, the
output channel corresponding to the memory
address number is switched to the input channel
entered. If ChnIdle is set: Idle pattern as written to
bits 7..0 is sent at the output channel. 0x0 X X