Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 193)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 193
RandC = Read and Clear specified bits automatically
Default:
Binary(0b) or hex(0x) value the respective bits are set to, when one of the reset conditions in
the following columns occurs or - = if nothing is stored, thus nothing can be reset
undef = undefined or
const = containing a constant value not affected by any reset.
Columns right of the default column contain a reset cause in the header row of the table and in
the table itself:.
- = bits are not affected by this reset
X = bits are set immediately to default value by this reset
F = bits are set to default value by connected function when this reset occurs
Reserved Bits within registers have an undefined value when read and should be written as read
before when written.
Reserved values:
* = all values of this bit/nibble position are reserved combinations
r = remaining not previously noted combinations of this bit/nibble positions are reserved
values
It is forbidden to write reserved combinations to registers.
[Hw: ...........] = Supplementary information about HW implementation, for HW review
purposes only
9.5.2.1 TSI Memory (TsiMem)
Resets: