Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 254)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 254
This register monitors the access to the local bus.
9.5.2.11.21Local Bus Access Monitor Reset Register
Address:
0x1491, LclBusMonResetReg
Width: 8 bit
This register resets the timeout flag in the respective monitor and address registers.
9.5.2.11.22Local Bus Access Monitor Address Register
Address:
0x1494, LclBusAccessTimeoutAddrReg
Width: 32 bit
Bit Acronym Type Description Default Pwr Soft
7...1 - - reserved undef - -
0 LclBusAccessTimeout R 0b1: LclBusAccessTimeout, An
access to the local bus timed out 0b0 F F
Bit Acronym Type Description Default Pwr Soft
7...1 - - reserved undef - -
0 LclBusAccessTimeoutReset RW 0b1:
LclBusAccessTimeoutReset,
The timeout flag in the
monitor register is reset. 0b0 X X