Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 308)

EXT FPGA
ARTM-831X Installation and Use (6806800M76E) 308
This register monitors the loss of signal outputs of the Xrt86 framer chips 2..5. If a loss of signal
occurs, the respective bit is set. It can be reset by writing the respective bit in
Xrt86LineEvtResReg.
Bit Acronym Type Description Default Pwr Soft
31 Xrt86Chp5RcvLoS7 R 0b1: Xrt86Chp5RcvLoS7, Chip 5
receiver Line 7 indicates loss of signal 0b0 F F
30 Xrt86Chp5RcvLoS6 R 0b1: Xrt86Chp5RcvLoS6, Chip 5
receiver Line 6 indicates loss of signal 0b0 F F
29 Xrt86Chp5RcvLoS5 R 0b1: Xrt86Chp5RcvLoS5, Chip 5
receiver Line 5 indicates loss of signal 0b0 F F
28 Xrt86Chp5RcvLoS4 R 0b1: Xrt86Chp5RcvLoS4, Chip 5
receiver Line 4 indicates loss of signal 0b0 F F
27 Xrt86Chp5RcvLoS3 R 0b1: Xrt86Chp5RcvLoS3, Chip 5
receiver Line 3 indicates loss of signal 0b0 F F
26 Xrt86Chp5RcvLoS2 R 0b1: Xrt86Chp5RcvLoS2, Chip 5
receiver Line 2 indicates loss of signal 0b0 F F
25 Xrt86Chp5RcvLoS1 R 0b1: Xrt86Chp5RcvLoS1, Chip 5
receiver Line 1 indicates loss of signal 0b0 F F
24 Xrt86Chp5RcvLoS0 R 0b1: Xrt86Chp5RcvLoS0, Chip 5
receiver Line 0 indicates loss of signal 0b0 F F
23 Xrt86Chp4RcvLoS7 R 0b1: Xrt86Chp4RcvLoS7, Chip 4
receiver Line 7 indicates loss of signal 0b0 F F
22 Xrt86Chp4RcvLoS6 R 0b1: Xrt86Chp4RcvLoS6, Chip 4
receiver Line 6 indicates loss of signal 0b0 F F
21 Xrt86Chp4RcvLoS5 R 0b1: Xrt86Chp4RcvLoS5, Chip 4
receiver Line 5 indicates loss of signal 0b0 F F
20 Xrt86Chp4RcvLoS4 R 0b1: Xrt86Chp4RcvLoS4, Chip 4
receiver Line 4 indicates loss of signal 0b0 F F
19 Xrt86Chp4RcvLoS3 R 0b1: Xrt86Chp4RcvLoS3, Chip 4
receiver Line 3 indicates loss of signal 0b0 F F
18 Xrt86Chp4RcvLoS2 R 0b1: Xrt86Chp4RcvLoS2, Chip 4
receiver Line 2 indicates loss of signal 0b0 F F
17 Xrt86Chp4RcvLoS1 R 0b1: Xrt86Chp4RcvLoS1, Chip 4
receiver Line 1 indicates loss of signal 0b0 F F