Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 79)

Functional Description
ARTM-831X Installation and Use (6806800M76E) 79
4.3.3.1 H-MVIP Interface
The Framer devices are connected to the TSI-FPGA device in H-MVIP mode. In this mode only
channel 0 and 4 transmit and receive signals are used for multiplexed payload data I/O (i.e. two
links with four channels each):
 2x 8192 Mbps multiplex to/from TSI-FPGA for each octal Framer
 16.384 MHz synchronous clock from ACS via TSI
 Tx Frame synchronization H-MVIP link, for single frame (125μs) or multi-frame: either 2ms
(E1) or 1.5ms (T1 SF) or 3ms (T1 ESF)
4.3.3.2 Local Bus
The Framer devices are connected to the Local Bus Interface in asynchronous, non-
multiplexed, Intel bus mode. The data bus width is 8Bit.The address bus width is 15Bit.
4.3.3.3 Line interface & redundancy support
All line protection circuitry and AC coupling is located at an external patch panel.
The unit provides R3 Redundancy according to EXAR Application Note. The active/standby
switchover between two ARTM-831X is provided by following two signals that are directly
routed from the front board logic via zone 3 & mezzanine connectors:
HEALTH Purpose is to indicate health of blade
Vhigh max at panel = +5V
Vhigh min at panel = +4.5V
Vlow max = +0.2V
I max = 500mA
Set HIGH when blade is operational
Set LOW when blade is non operational or fault detected