Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 165)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 165
The CM (connection memory) holds the information which of the input channel has to be
connected to an output channel of the TSI. The address of the CM (0 to 64k) is the number of
the output channel. The TSI reads every memory entry one time during a time frame. The 16bit
lower bits of the memory data value addresses the SM for read out the desired data of the
connected channel.
The bit 16 of the CM data has to be '0' for normal channel connection. If this bit is set to '1' no
TSI connection is configured but the lower 8 bits of the memory data value is driven to the TSI
output of the addressed channel. This can be used for sending idle pattern or other constant
pattern.The bit 17 of the CM is not used by the TSI function.
9.4.2 GR8
The GR8 block is connected to the TSI to send and receive up to 1024 channel data. These
channels hold signalling information and are to be connecting to the SBI and HMIP interfaces
via the TSI.
9.4.3 Testpattern Generator (input)
The Testpattern generator inserts pseudo-random or static testpattern at the input of the TSI.
The Testpattern generator substitutes the data of one channel sends to the TSI, e.g. by Sbi2Tsi.
This means, that testpattern can be configured as input to a selectable channel of the TSI.
The channel number and the kind of pattern can be programmed by the host.
9.4.4 Testpattern Comparator (input)
The Testpattern comparator checks for pseudo-random or static testpattern at one channel on
the TSI input directly. Along with this the input data of the channel are still written to the TSI
memory without disturbance, e.g. data that are coming from Sbi2Tsi.
The channel number and the kind of pattern to compare can be programmed by the host.