Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 170)

TSI FPGA
ARTM-831X Installation and Use (6806800M76E) 170
Serdes link to RTM FPGA Indication
DebugLed[5:3] toggle
between SERDES / PCIe
link number and the
status of the previous
indicated link
1. eight seconds
DebugLed[5] blink
DebugLed[4:3] next status for SREDES
0..2 and 3 for PCIe
2. eight seconds
status SERDES 0..2
DebugLed[5] On - Serdes 0 Transmit
PLL locked Off - loss of lock
DebugLed[4] On - Serdes 0 Receive PLL
locked Off - loss of lock
DebugLed[3] On - Serdes 0 Receiver
has found comma status
PCIe
DebugLed[5] On - PCIe reset
DebugLed[4] On - Acknowledge Forced
DebugLed[3] On - link up
SW interface
DebugLed[2] DebugLedReg Bit 2
DebugLed[1] DebugLedReg Bit 1
DebugLed[0] DebugLedReg Bit 0
Table 9-4 RTM FPGA Degug LEDs (continued)