6 sfp txdis control, 7 10 ge status register, 6 sfp txdis control 8.3.1.7 10 ge status register – Artesyn ARTM-831X Installation and Use (June 2014) User Manual
Page 134: Table 8-30, Sfp txdis control, Table 8-31, 10 ge status register, Base artm fpga
Base ARTM FPGA
ARTM-831X Installation and Use (6806800M76E)
134
8.3.1.6
SFP TXDIS Control
8.3.1.7
10 GE Status Register
Table 8-30 SFP TXDIS Control
Address: 0x5
Bit
Description
Default
Access
7:0
Drive Signal SFP_TXDIS_1 to SFP_TXDIS_8
0
RTM: r/w
MMC: r/w
Table 8-31 10 GE Status Register
Address: 0x6 - 0x7
Bit Description
Default
Access
0
Level of Signal N10GE_1_SFP_LOS
Ext.
RTM: r
MMC: r
1
Level of Signal N8707_OPTXENB1
Ext.
RTM: r
MMC: r
2
Level of Signal N8707_LASI_
Ext.
RTM: r
MMC: r
3
Level of Signal N8707_PCMULK
Ext.
RTM: r
MMC: r
4
Level of Signal GE_LC_RECCLK1
Ext.
RTM: r
MMC: r
5
Level of Signal GE_LC_RECCLK2
Ext.
RTM: r
MMC: r
6
Level of Signal FPGA_ACTIVE_RTM_OUT
Ext.
RTM: r
MMC: r
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