Artesyn ARTM-831X Installation and Use (June 2014) - Manual (Page 313)

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ARTM-831X Installation and Use (6806800M76E) 313
10.4.2.1.10Xrt86 Framer Line Event Status Mask Register
Address:
0x28, Xrt86LineEvtMaskReg
7 Xrt86Chp2RcvLoSIntrptR
eset7 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset7,
resets chip 2 receiver Line 7 loss
of signal indicator bit 0b0 X X
6 Xrt86Chp2RcvLoSIntrptR
eset6 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset6,
resets chip 2 receiver Line 6 loss
of signal indicator bit 0b0 X X
5 Xrt86Chp2RcvLoSIntrptR
eset5 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset5,
resets chip 2 receiver Line 5 loss
of signal indicator bit 0b0 X X
4 Xrt86Chp2RcvLoSIntrptR
eset4 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset4,
resets chip 2 receiver Line 4 loss
of signal indicator bit 0b0 X X
3 Xrt86Chp2RcvLoSIntrptR
eset3 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset3,
resets chip 2 receiver Line 3 loss
of signal indicator bit 0b0 X X
2 Xrt86Chp2RcvLoSIntrptR
eset2 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset2,
resets chip 2 receiver Line 2 loss
of signal indicator bit 0b0 X X
1 Xrt86Chp2RcvLoSIntrptR
eset1 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset1,
resets chip 2 receiver Line 1 loss
of signal indicator bit 0b0 X X
0 Xrt86Chp2RcvLoSIntrptR
eset0 RW 0b1:
Xrt86Chp2RcvLoSIntrptReset0,
resets chip 2 receiver Line 0 loss
of signal indicator bit 0b0 X X
Bit Acronym Type Description Default Pwr Soft