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Mode of frame field list, Other, Sampling memory usage optimization – Teledyne LeCroy STX M6-1 SAS_SATA Protocol Analyzer User Manual User Manual

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Sierra M6‐4 SAS/SATA Protocol Analyzer User Manual

253

Display Configuration

LeCroy Corporation

Mode of Frame Field List:

Transport: Shows decoding of transport layer.

Application: Shows decoding of Application layer.

Both: Shows decoding of both transport and application layers.

Other

Payload Field Length: Specifies the number of bytes that are shown in the field list for
payload fields.

Show Field List as Embedded In Frame/Spreadsheet Views: The Field List is embedded in
frame/spreadsheet views. Otherwise, it will open as a separated view.

Show Field List in Column View: The software embeds the Field List in the column.
Otherwise, the Field List is not in Column View.

Sampling Memory Usage Optimization

The Software Settings dialog has a Sampling Memory Usage Optimization option. This
Memory Assignment (MA) feature optimizes sampling memory utilization.

If the Sampling Memory Usage Optimization Option is Checked

The system tries to use empty space in all memory banks to prevent any memory bank
from filling completely. Each physical link is not necessarily assigned to a specific memory
bank. The system can capture more sample data than if the MA option is unchecked, and
sample file size is closer to the user‐defined Sampling Memory Size.

Memory Assignment efficiency varies with Port Configuration and Trigger Position:

FPGA: The Memory Assignment feature works for a pair of ports connected to
one FPGA, for example ports 1 and 2 (or ports 3 and 4). Memory Assignment
does not work for two ports connected to different FPGAs, for example ports 1
and 3.

Triggering: Memory Assignment only starts after the trigger point. During 
pre‐trigger, each physical link is always assigned to a specific memory bank.
Post‐trigger, the system can try to use empty space in all memory banks, if you
check the MA option. Therefore, Memory Assignment efficiency is maximum
when Trigger Position is set to 0% (snap‐shot trigger) and is minimum when Trig‐
ger Position is set to 99% or when there is no triggering (you stop recording man‐
ually).

MUX: When MUX is enabled, each segment has four memory banks, limiting
Memory Assignment somewhat.

Here are examples of different Port Configurations and Trigger Positions:

One port configuration (A ‐ ‐ ‐): Sample size is user‐specified sample size.

Two port configuration (AA ‐ ‐): Ports 1 and 2 are on the same FPGA, so
Memory Assignment has an effect. If you use snapshot triggering, the sam‐
ple size is near specified size.