Avago Technologies LSI53C1010R - Manual (Page 95)

LSI53C1010R PCI to Dual Channel Ultra160 SCSI Multifunction Controller 3-1
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Chapter 3
Signal Descriptions
This chapter describes the input and output signals of the LSI53C1010R.
The chapter consists of the following sections:
•
Section 3.1, “Signal Organization”
•
Section 3.2, “Internal Pull-ups and Pull-downs on LSI53C1010R
Signals”
•
Section 3.3, “PCI Bus Interface Signals”
•
Section 3.4, “SCSI Bus Interface Signals”
•
Section 3.5, “General Purpose I/O (GPIO) Signals”
•
Section 3.6, “Flash ROM and Memory Interface Signals”
•
Section 3.7, “Test Interface Signals”
•
Section 3.8, “Power and Ground Signals”
•
Section 3.9, “MAD Bus Programming”
3.1 Signal Organization
The LSI53C1010R has five major interfaces:
•
PCI Interface
•
SCSI Bus Interface
•
GPIO
•
Memory Interface
•
Test Interface
Figure 3.1 illustrates the signals, their grouping, and their I/O direction. A
slash (/) at the end of a signal name indicates that it is an active LOW
signal. When the slash is absent, the signal is active at a HIGH voltage.