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Avago Technologies LSI53C1010R User Manual

Page 17

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xvii

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

6.32

External Memory Write

6-41

6.33

Normal/Fast Memory (

128 Kbytes) Single Byte

Access Read Cycle

6-44

6.34

Normal/Fast Memory (

128 Kbytes) Single Byte

Access Write Cycle

6-46

6.35

Slow Memory (

128 Kbytes) Read Cycle

6-52

6.36

Slow Memory (

128 Kbytes) Write Cycle

6-54

6.37

64 Kbytes ROM Read Cycle

6-56

6.38

64 Kbytes ROM Write Cycle

6-57

6.39

Initiator Asynchronous Send

6-58

6.40

Initiator Asynchronous Receive

6-59

6.41

Target Asynchronous Send

6-59

6.42

Target Asynchronous Receive

6-60

6.43

SCSI-1 Transfers (SE 5.0 Mbytes)

6-60

6.44

SCSI-2 Fast Transfers 10.0 Mbytes (8-Bit Transfers)
or 20.0 Mbytes (16-Bit Transfers) 40 MHz Clock

6-61

6.45

Ultra SCSI SE Transfers 20.0 Mbytes (8-Bit Transfers)
or 40.0 Mbytes (16-Bit Transfers) Quadrupled
40 MHz Clock

6-61

6.46

Ultra2 SCSI Transfers 40.0 Mbyte (8-Bit Transfers)
or 80.0 Mbyte (16-Bit Transfers) Quadrupled
40 MHz Clock

6-62

6.47

SCSI-2 Fast Transfers 10.0 Mbytes (8-Bit Transfers)
or 20.0 Mbytes (16-Bit Transfers) 40 MHz Clock

6-63

6.48

Ultra SCSI SE Transfers 20.0 Mbytes (8-Bit Transfers)
or 40.0 Mbytes (16-Bit Transfers) Quadrupled
40 MHz Clock

6-63

6.49

Ultra2 SCSI Transfers 40.0 Mbyte (8-Bit Transfers)
or 80.0 Mbyte (16-Bit Transfers) Quadrupled
40 MHz Clock

6-64

6.50

Ultra160 SCSI Transfers 160 Mbyte (16-Bit Transfers)
Quadrupled 40 MHz Clock

6-65

6.51

Alphanumeric List by Signal Name

6-70

6.52

Alphanumeric List by BGA Position

6-72

A.1

LSI53C1010R PCI Register Map

A-1

A.2

LSI53C1010R SCSI Register Map

A-3