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Scsi status one (sstat1), Register: 0x0e – Avago Technologies LSI53C1010R User Manual

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SCSI Registers

4-45

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

WOA

Won Arbitration

2

When set, WOA indicates that the LSI53C1010R SCSI
function has detected a Bus Free condition, arbitrated for
the SCSI bus, and won arbitration. The arbitration mode
selected in the

SCSI Control Zero (SCNTL0)

register

must be full arbitration and selection to set this bit.

RST

SCSI RST/ Signal

1

This bit reports the current status of the SCSI RST/
signal, and the RST signal (bit 3) in the

SCSI Control One (SCNTL1)

register. This bit is not

latched and may change as it is read.

SDP0

SCSI SDP0 Parity Signal

0

This bit represents the present state of the SCSI SDP0/
parity signal. This signal is not latched and may change
as it is read.

Register: 0x0E

SCSI Status One (SSTAT1)
Read Only

R

Reserved

[7:4]

SDP0L

Latched SCSI Parity

3

This bit reflects the SCSI parity signal (SDP0/)
corresponding to the data latched in the

SCSI Input Data Latch (SIDL)

. It changes when a new

byte is latched into the least significant byte of the SIDL
register. This bit is active HIGH, in other words, it is set
when the parity signal is active.

MSG

SCSI MSG/ Signal

2

This SCSI phase status bit is latched on the asserting
edge of SREQ/ when operating in either the initiator or
target mode. This bit is set when the corresponding
signal is active. This bit is useful when operating in the
low level mode.

7

4

3

2

1

0

R

SDP0L

MSG

C_D

I_O

0

0

0

0

x

x

x

x