Avago Technologies LSI53C1010R User Manual
Page 351
SCSI Timing Diagrams
6-61
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Table 6.44
SCSI-2 Fast Transfers 10.0 Mbytes (8-Bit Transfers) or 20.0 Mbytes
(16-Bit Transfers) 40 MHz Clock
Symbol
Parameter
Min
Max
Unit
t
ST1
Send SREQ/ or SACK/ assertion pulse width
30
–
ns
t
ST2
Send SREQ/ or SACK/ deassertion pulse width
30
–
ns
t
ST1
Receive SREQ/ or SACK/ assertion pulse width
22
–
ns
t
ST2
Receive SREQ/ or SACK/ deassertion pulse width
22
–
ns
t
ST3
Send data setup to SREQ/ or SACK/ asserted
24
–
ns
t
ST4
Send data hold from SREQ/ or SACK/ asserted
34
–
ns
t
ST5
Receive data setup to SREQ/ or SACK/ asserted
14
–
ns
t
ST6
Receive data hold from SREQ/ or SACK/ asserted
24
–
ns
Table 6.45
Ultra SCSI SE Transfers 20.0 Mbytes (8-Bit Transfers) or 40.0 Mbytes
(16-Bit Transfers) Quadrupled 40 MHz Clock
1
1. Note: for fast SCSI, set the TolerANT Enable bit (bit 7 in
).
Symbol
Parameter
Min
Max
Unit
t
ST1
Send SREQ/ or SACK/ assertion pulse width
15
–
ns
t
ST2
Send SREQ/ or SACK/ deassertion pulse width
15
–
ns
t
ST1
Receive SREQ/ or SACK/ assertion pulse width
11
–
ns
t
ST2
Receive SREQ/ or SACK/ deassertion pulse width
11
–
ns
t
ST3
Send data setup to SREQ/ or SACK/ asserted
12
–
ns
t
ST4
Send data hold from SREQ/ or SACK/ asserted
17
–
ns
t
ST5
Receive data setup to SREQ/ or SACK/ asserted
6
–
ns
t
ST6
Receive data hold from SREQ/ or SACK/ asserted
11
–
ns