Scratch register b (scratchb), Registers: 0x5c–0x5f – Avago Technologies LSI53C1010R User Manual
Page 217
SCSI Registers
4-99
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0x5C–0x5F
Scratch Register B (SCRATCHB)
Read/Write
SCRATCHB
Scratch Register B
[31:0]
This is a general purpose user definable scratchpad
register. Apart from CPU access, only register
Read/Write and Memory Moves directed at the
SCRATCH register alter its contents. The power-up
values are indeterminate. A special mode of this register
can be enabled by setting the PCI Configuration Info
Enable bit in the
register. If this
bit is set, bits [31:13] of the
register return bits
[31:13] of the PCI
Base Address Register Three (BAR3) (SCRIPTS RAM)
In this mode, bits [12:0] of SCRATCH B always return
zeros. Writes to the SCRATCH B register have no effect.
Resetting the PCI Configuration Info Enable bit causes
the SCRATCH B register to return to normal operation.
Registers: 0x60–0x9F
Scratch Registers C–R (SCRATCHC–SCRATCHR)
Read/Write
These are general purpose user definable scratch pad registers. Apart
from CPU access, only register Read/Write, Memory Moves, and
Load/Stores directed at a SCRATCH register alter its contents. The
power-up values are indeterminate.
31
0
SCRATCHB
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0