Script fetch selector (sfs), Registers: 0xa8–0xab, Registers: 0xac–0xaf – Avago Technologies LSI53C1010R User Manual
Page 219
SCSI Registers
4-101
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
writes to the MMWS register have no effect. Clearing the
PCI Configuration Info Enable bit causes the MMWS
register to return to normal operation.
Registers: 0xA8–0xAB
SCRIPT Fetch Selector (SFS)
Read/Write
SFS
SCRIPT Fetch Selector
[31:0]
This register supplies AD[63:32] during SCRIPT Fetches
and Indirect Fetches (excluding Table Indirect Fetches).
This register can be loaded automatically using a 64-bit
jump instruction.
A special mode of this register can be enabled by setting
the PCI Configuration Info Enable bit in the
register. If this bit is set, bits
[23:16] of this register return the PCI
register value and bits [15:0] return the PCI
register value when read. Writes to the
register have no effect.
Clearing the PCI Configuration Info Enable bit causes the
SFS register to return to normal operation.
Registers: 0xAC–0xAF
DSA Relative Selector (DRS)
Read/Write
DRS
DSA Relative Selector
[31:0]
This register supplies AD[63:32] during Table Indirect
Fetches and Load/Store
relative operations.
31
0
SFS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
31
0
DRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0