Scsi output data latch (sodl), Register: 0x53 – Avago Technologies LSI53C1010R User Manual
Page 210
4-92
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Register: 0x53
Current Inbound SCSI Offset (CSO)
Read Only
R
Reserved
[7:6]
CSO[5:0]
Current SCSI Offset
[5:0]
These bits indicate the SCSI offset for synchronous
inbound transfers. This also represents the number of data
bytes in the SCSI FIFO in narrow transfer modes and half
the number of bytes in wide transfer mode. This does not
include any CRC or PAD bytes that may be in the FIFO.
Registers: 0x54–0x55
SCSI Output Data Latch (SODL)
Read/Write
SODL
SCSI Output Data Latch
[15:0]
This register is used primarily for diagnostics testing and
programmed I/O operations. Data written to this register
is asserted on the SCSI data bus by setting the
Assert Data Bus bit in the
register. This register sends data using programmed I/O.
Data flows through this register when sending data in
asynchronous mode. It also writes to the synchronous
data FIFO when testing the chip. The power-up value of
this register is indeterminate.
7
6
5
0
R
CSO[5:0]
0
0
0
0
0
0
0
0
15
0
SODL
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x