2 second dword, 3 third dword, Figure5.14 memory move instructions – third dword – Avago Technologies LSI53C1010R User Manual

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5-38

SCSI SCRIPTS Instruction Set

Version 2.2

The

is not writable using the CPU, and

therefore not by a Memory Move. However, it can be loaded using
SCRIPTS Read/Write operations. To load the SFBR with a byte stored
in system memory, first move the byte to an intermediate LSI53C1010R
register (for example, a SCRATCH register), and then to the

SCSI First Byte Received (SFBR)

The same address alignment restrictions apply to register access
operations as to normal memory-to-memory transfers.

5.6.2 Second Dword

This section describes the second Dword of the Memory Move
Instruction register.

Figure 5.13 Memory Move Instructions – Second Dword

DSPS Register

[31:0]

These bits contain the source address of the Memory
Move.

If the source address is in the 64-bit address space, the bits
are contained in the

Memory Move Read Selector (MMRS)

5.6.3 Third Dword

This section describes the third Dword of the Memory Move Instruction
register.

Figure 5.14 Memory Move Instructions – Third Dword

DSPS Register

MMRS Register

TEMP Register