Scsi chip id (scid), Register: 0x04 – Avago Technologies LSI53C1010R User Manual
Page 151
SCSI Registers
4-33
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
on SD[15:8]/ and SDP1/. Command, Status, and
Message phases are not affected by this bit. Because
Ultra160 DT SCSI transfers are always wide this bit must
be set. If it is not set, an SGE interrupt occurs.
R
Reserved
[2:0]
Register: 0x04
SCSI Chip ID (SCID)
Read/Write
R
Reserved
7
RRE
Enable Response to Reselection
6
When this bit is set, the LSI53C1010R SCSI function is
enabled to respond to bus-initiated reselection at the chip
ID in the
and
registers. Note that the
chip does not automatically reconfigure itself to the
initiator mode as a result of being reselected.
SRE
Enable Response to Selection
5
When this bit is set, the LSI53C1010R SCSI function is
able to respond to bus-initiated selection at the chip ID in
the
and
registers. Note that the
chip does not automatically reconfigure itself to target
mode as a result of being selected.
R
Reserved
4
ENC[3:0]
Encoded Chip SCSI ID
[3:0]
These bits store the LSI53C1010R SCSI function encoded
SCSI ID. This is the ID that the chip asserts when
arbitrating for the SCSI bus. The IDs that the LSI53C1010R
SCSI function responds to when selected or reselected are
7
6
5
4
3
0
R
RRE
SRE
R
ENC[3:0]
x
0
0
x
0
0
0
0