Avago Technologies LSI53C1010R - Manual (Page 91)

Power Management 2-61
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
2.4.2 No Download Mode
When MAD[7] is pulled up through an external resistor, the automatic
download is disabled and data is not automatically loaded into chip
registers at power-up. The Subsystem ID and Subsystem Vendor ID
registers are read only, according to the PCI specification, with a default
value of 0x1000 and 0x1000, respectively.
2.5 Power Management
The LSI53C1010R complies with the PCI Bus Power Management
Interface Specification, Revision 1.1, in which the D0, D1, D2, and D3
are defined.
D0 is the maximum powered state, and D3 is the minimum powered
state. Power state D3 is further categorized as D3hot or D3cold. A
function that is powered off is in the D3cold power state.
Table 2.8 Default Download Mode Serial EEPROM Data Format
Byte Name Description
0xFB SVID(0) Subsystem Vendor ID (SVID) , LSB. This byte is loaded
into the least significant byte of the Subsystem Vendor
ID register in the appropriate PCI configuration space at
chip power-up.
0xFC SVID(1) Subsystem Vendor ID (SVID) , MSB. This byte is loaded
into the most significant byte of the Subsystem Vendor
ID register in the appropriate PCI configuration space at
chip power-up.
0xFD SID(0) Subsystem ID (SID) , LSB. This byte is loaded into the
least significant byte of the Subsystem ID register in the
appropriate PCI configuration space at chip power-up.
0xFE SID(1) Subsystem ID (SID) , MSB. This byte is loaded into the
most significant byte of the Subsystem ID register in the
appropriate PCI configuration space at chip power-up.
0xFF CKSUM Checksum (CKSUM). This 8-bit checksum is formed by
adding, bytewise, each byte contained in locations
0xFB–0xFE to the seed value (0x55) and then taking the
twos complement of the result.