Avago Technologies LSI53C1010R - Manual (Page 187)

SCSI Registers 4-69
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
STD Start DMA Operation 2
The LSI53C1010R SCSI function fetches a SCSI
SCRIPTS instruction from the address contained in the
DMA SCRIPTS Pointer (DSP) register when this bit is
set. This bit is required if the LSI53C1010R SCSI function
is in one of the following modes:
•
Manual start mode – Bit 0 in the DMA Mode (DMODE)
register is set
•
Single-step mode – Bit 4 in the DMA Control (DCNTL)
register is set
When the LSI53C1010R SCSI function is executing
SCRIPTS in manual start mode, the Start DMA bit must
be set to start instruction fetches, but need not be set
again until an interrupt occurs. When the LSI53C1010R
SCSI function is in the single-step mode, set the
Start DMA bit to restart execution of SCRIPTS after a
single-step interrupt.
R Reserved 1
COM LSI53C700 Family Compatibility 0
When the COM bit is cleared, the LSI53C1010R SCSI
function behaves in a manner compatible with the
LSI53C700 family; selection/reselection IDs are stored in
both the
SCSI Selector ID (SSID) and
SCSI First Byte Received (SFBR) registers. This bit is not
affected by a software reset.
If the COM bit is cleared, do not access this register using
SCRIPTS operation because indeterminate operations
may occur. This includes SCRIPTS Read/Write operations
and conditional transfer control instructions that initialize
the
SCSI First Byte Received (SFBR) register.
When the COM bit is set, the ID is stored only in the
SCSI Selector ID (SSID) register, protecting the
SCSI First Byte Received (SFBR) from being overwritten
if a selection /reselection occurs during a DMA
register-to-register operation.