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6 reliability, 7 testability, Reliability – Avago Technologies LSI53C1010R User Manual

Page 29: Testability

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Summary of LSI53C1010R Benefits

1-11

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

1.6.6 Reliability

The following features enhance the reliability of the LSI53C1010R:

CRC and AIP provide end-to-end SCSI I/O protection.

2 kV ESD protection on SCSI signals.

Protection against bus reflections due to impedance mismatches.

Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification).

Latch-up protection greater than 150 mA.

Voltage feed-through protection (minimum leakage current through
SCSI pads).

A high proportion of pins are power and ground.

Power and ground isolation of I/O pads and internal chip logic.

TolerANT technology provides:

Active negation of SCSI Data, Parity, Request, and Acknowledge
signals for improved fast SCSI transfer rates.

Input signal filtering on SCSI receivers improves data integrity,
even in noisy cabling environments.

1.6.7 Testability

The following features enhance the testability of the LSI53C1010R:

All SCSI signals accessible through programmed I/O.

SCSI bus signal continuity checking.

Support for single-step mode operation.

JTAG boundary scan.