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Avago Technologies MGA-71543 User Manual

Introduction, Design overview and summary

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Revision 19/07/01 Page 1

2.4 GHz application using MGA-71543, a Low
Noise Amplifier with Bypass Switch.

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INTRODUCTION

:

The MGA-71543 is a single stage GaAs RFIC

low noise amplifier with an integrated bypass
switch (Figure 1).

Figure 1. MGA-71543. Functional Diagram

The purpose of the switch feature is to prevent
distortion of high signal levels in receiver
applications by bypassing the amplifier.
Furthermore it saves current thus improving
battery life.

One of the two ground leads of the amplifier is
tied to the control leads of the switch to allow
simple control of the bias. Therefore, using one
of the ground leads, it is possible to vary the bias
current (including completely shutting down the
amplifier) by varying the resistor to ground that
is attached to it.

In short, the MGA-71543 is a small LNA/Bypass
Switch MMIC that provides a low Noise figure,
a high gain and high third order input intercept
point (IIP3) especially suitable for the LNA stage
in applications.

This application note describes a 2.4GHz Low

noise amplifier design using Agilent
Technologies’ MGA-71543.

Design overview and summary:

The board used for this design is shown in

figure2. The schematic of this board is shown
in figure 3. The number of components used
can be reduced in a real application circuit
because some jumpers (0

resistors), and

bypass capacitors can be eliminated without
performance degradation (some are only used

for ease, or if tuning is necessary and also as a
precaution to avoid any possible oscillation).

Matching and biasing

A simple shunt L of 1.3nH at the input provides
the noise matching and the necessary DC
grounding of the input pin. Series L is shown as
0R link, but a small amount of inductance here
of typically 0.5nH does improve return loss and
NF slightly. Such a small lumped element
becomes impractical although individual PCB
designs should be ale to incorporate this into
tracking. Because the main active device is a
depletion mode FET, source-biasing technique is
used so that only one positive DC supply is
required at the output. The input (gate) is DC
grounded and the source is RF bypassed, while
current setting resistors (R20 or R21) are
attached to ground.

A simple shunt-series network at the output does
the required matching for linearity at lower
frequencies but at 2.4GHz it was found that the
addition of a shunt L element vastly improved
output and input return loss. The arrangement
therefore consists of a 3.9nH shunt element
which also provides the DC feed / RF choke,
with a series 3.3pF cap. The shunt element is
placed directly across the output connector. The
output-matching network does not affect the
noise figure, which was already set by the input
matching.

R38 and R25 provide some resistor loading at
low frequencies. R37 improves stability at lower
frequencies but may be omitted depending on
each application. Omission will increase gain
slightly. The rest of the components used,
including bypass capacitors (C8, C36, C37, C44,
C47), current setting resistors (R20 or R21),
voltage drop resistor (R24), DC block capacitors,
are all listed in table 1.

Performance Results

It is possible to achieve 3.7dBm of input Third
order intercept Point (IIP3) at 2.4GHz with a
device current of 11mA.

RF IN

RF OUT

SW & Bias Control