Aip control zero (aipcntl0), Register: 0xbd, Register: 0xbe – Avago Technologies LSI53C1010R User Manual
Page 231
SCSI Registers
4-113
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Register: 0xBD
Reserved
This register is reserved.
Register: 0xBE
AIP Control Zero (AIPCNTL0)
Read Only
R
Reserved
[7:3]
AIPERR_LIVE
AIP Error Status Live
2
This bit represents the live error status for the AIP
checking logic. A high indicates an error while low
indicates no error. This is not a latched value; therefore,
an error could have occurred previously and not be
indicated by this bit.
This bit indicates the AIP error status whether or not AIP
checking is enabled. Therefore, only use this bit when AIP
checking is enabled. This bit may indicate false errors and
should not be used except for diagnostic purposes.
AIPERR
AIP Error Status
1
This bit represents the error status for the AIP checking
logic. This bit is set upon an AIP error and cleared either
when the interrupt is cleared or the RAIPER bit is set in
the
register.
This bit indicates the AIP error status whether or not AIP
checking is enabled. Therefore, only use this bit when
AIP checking is enabled.
7
0
R
x
x
x
x
x
x
x
x
7
3
2
1
0
R
AIPERR_LIVE
AIPERR
PARITYERR
0
0
0
0
0
0
0
0