Avago Technologies LSI53C1010R User Manual
Page 273
Read/Write Instructions
5-25
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
OPC[2:0]
Opcode
[29:27]
These bits determine whether the instruction is a
Read/Write or an I/O instruction. Opcodes 0b000 through
0b100 are considered I/O instructions.
O[2:0]
Operator
[26:24]
The Operator bits are used in conjunction with the opcode
bits to determine which instruction is currently selected.
Refer to
on
for field definitions.
D8
Use data8/SFBR
23
When this bit is set,
SCSI First Byte Received (SFBR)
is
used, instead of the data8 value, during a
Read-Modify-Write instruction (refer to
). This
allows the user to add two register values.
A[6:0]
Register Address – A[6:0]
[22:16]
It is possible to change register values from SCRIPTS in
read-modify-write cycles or move to/from
SCSI First Byte Received (SFBR)
cycles. A[6:0] selects
an 8-bit source/destination register within the
LSI53C1010R.
IMMD
Immediate Data
[15:8]
This 8-bit value is used as a second operand in logical
and arithmetic functions.
A7
Upper Register Address Line [A7]
7
This bit accesses registers 0x80–0xFF.
R
Reserved
[6:0]
Must be 0.